Active Antenna Design - Design group 3

Table of contents

  1. Design Overview
  2. Assignment 1 - Drive Capability CS-stage
  3. Assignment 2 - Modelling the transistor
  4. Assignment 3 - Noise analysis
  5. Assignment 4 - Complementary-parallel CS output stage
  6. Assignment 5 - Signal path design
  7. Assignment 5 - Input stage design
  8. Assignment 5 - Frequency analysis
  9. Assignment 6 - Bandwidth limitation
  10. Assignment 6 - Biasing
  11. Conclusion on the design process

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SLiCAP: Symbolic Linear Circuit Analysis Program, Version 1.0 © 2009-2021 SLiCAP development team

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Last project update: 2022-01-13 18:09:51